There are multiple UARTS on NavQPlus.

Because of pinmuxing these can sometimes be assigned to different uses and locations depending on the specifics of the Linux BSP and DTB files. The default configuration for NavQPlus LInux image provided at time of publication will be described here. Please double check any notes on your specific Linux Image if something varies from this configuration.

Introduction

UART2 by default is the Debug or Console port into the main A53 processors running Linux on NavQPlus. It is possible to reassign its use by modifying the Linux configuration and .dtb files.

UART2 Locator

UART2 interface and voltage

The signaling from the SOM to the NavQPlus carrier board on J10 is at 3V3. Full handshaking with CTS RTS lines is provided:

Console connection

Normal configuration and usage of UART2 is a console for bootup and Linux. The benefit of using the debug/console is that you can observe all details from powerup.

Details of the console connection including the Baud rate are provided under "Serial Console" in the Quickstart section of this gitbook. See the link below:

Introduction

UART4 is available for general use. Hardware flow control is supported.

Note from the schematic clip below, that the MPU can multiplex these signals with SPI2. This is normally configured in the Linux image, and is not the default configuration.

UART4 Locator

UART4 interface voltage

The signaling from the SOM to the NavQPlus carrier board on J11 is at 3V3

Alternative output is on the AUX connector at location J12 also at 3V3 signalling. However this is not the default linux BSP, and would require changes to the dtb files.

Schematic

J11/UART4 is the default location for UART4 signals. Also by default UART4 is assigned to the M7 Core on the i.MX8M Plus. An RTOS such as FreeRTOS or Zephyr would normally use it as the default console to the embedded MCU.

UART NetNames

Note signal names are differed on J11 vs J12. This is only a labelling detail, since the pinmuxing on the chip is used to "move" the UART4 interface from one set of pins on the MPU (and board to board header). In order to route these signals independently on the carrier board, they need their own net names.

UART ESD

All the UART signals are protected from ESD using the Nexperia IP4292CZ components. This is part of an optimized BOM as they are also required for the USB interfaces. In additional to its exceptional performance the board layout may be optimized because of being able to route traces straight under the component.

Software

UART3 may be accessed as a standard /dev/ttyS_ in Linux. <TODO-check wich ttyS number it is>

Introduction

UART3 is available for general use. Hardware flow control is supported.

Note from the schematic clip below, that the MPU can multiplex these signals with SPI1. This is normally configured in the Linux image and is not the default configuration.

UART3 Interface voltage

The signaling from the SOM to the NavQPlus carrier board on J9 is at 3V3 but the Murata 1ZM expects 1.8V. The level conversion is done using U26.

UART3 Locator

Schematic

All the UART signals are protected from ESD using the Nexperia IP4292CZ components. This is part of an optimized BOM as they are also required for the USB interfaces. In additional to its exceptional performance the board layout may be optimized because of being able to route traces straight under the component.

Software

UART3 may be accessed as a standard /dev/ttyS_ in Linux. UART3 may be accessed /dav/ttymxc2 in linux <TODO-check wich ttyS number it is>

Introduction

UART1 is assigned to communicate with the Bluetooth portion of the WiFi/BT Wireless module on the NavQPlus Baseboard. Therefore it is not available for general use (outside of creating your own modified custom baseboard).

UART1 interface voltage

The signaling from the SOM to the NavQPlus carrier board on J16 is at 3V3 but the Murata 1ZM expects 1.8V. The level conversion is done using U26.

Software

Murata WiFi BT Module

The module is Murata 1ZM using the NXP 88W8987 chipset. Type 1ZM is a small and very high-performance module based on NXP 88W8987 combo chipset which supports Wi-Fi® 802.11a/b/g/n/ac + Bluetooth® 5.1 BR/EDR/LE up to 433Mbps PHY data rate on Wi-Fi® and 3Mbps PHY data rate on Bluetooth®. The WLAN section supports SDIO 3.0 interface and the Bluetooth® section supports high-speed 4-wire UART interface and PCM for audio data.

The 88W8987 implements highly sophisticated enhanced collaborative coexistence hardware mechanisms and algorithms, which ensure that WLAN and Bluetooth® collaboration is optimized for maximum performance.

In IEEE 802.11ac mode, the WLAN operation supports rates of MCS0 - MCS9 (up to 256 QAM) in 20MHz, 40MHz and 80MHz channels for data rate up to 433Mbps.

Type 1ZM module is packaged in an impressively small form factor that facilitates integration into size- and power-sensitive applications such as IoT applications, handheld wireless system, gateway and more.